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# Study Mid Term Quiz-1 CS302 Digital Logic And Design Online

Demultiplexer has
single input and single outputs
multiple inputs and multiple outputs
single input and multiple outputs
multiple inputs and single output
Sequential circuits have stronge elements
TRUE
FALSE
The programmable array logic(PAL) has AND array and a OR array
fixed,programmable
programmable,fixed
fixed,fixed
programmable,programmable
The four outputs of two 4 input multiplexer,connected to form a 16 input multiplexer are connected together through a 4 input gate
AND
OR
NAND
XOR
Two 2 input,4 bit multiplexer 74X157 can be connected to implement a multiplexer
2 input,4 bit
4 input,8 bit
4 input,16 bit
2 input,8 bit
3 to 8 decoder can be used to implement standard SOP and POS boolean expressions
TRUE
FALSE
For a 3 to 8 decoder how many 2 to 4 decoders will be required?
2
3
4
1
"74ALS" stands for
advanced low-frequency schottky TTL
advanced low-dissipation schottky TTL
advanced low-power schottky TTL
advanced low-propagation schottky TTL
NOR gate is formed by connecting
OR gate and then NOT gate
NOT gate and then OR gate
AND gate and then OR gate
OR gate and then AND gate
The diagram given below represents demorgans law
associative law
product of sum form
sum of product form
The decimal equivalent of the binary number"10011" is
19
99
29
none of given
The first least significant digit in decimal number system has
position 0 and weight equal to 1
position 1 and weight equal to 0
position 1 and weight equal to 10
position 0 and weight equal to 10
Demultiplexer has
single input and single outputs
multiple inputs and multiple outputs
single inpput and multiple outputs
multiple inputs and single outpuut
The ABEL notation equivalent to boolean expression A+B is
A&B
A!B
A#B
A$B In ABEL the variable 'A' is treated separately from variable'a' TRUE FALSE The PROM consists of a fixed non programmable_______________gate array configured as a decoder AND OR NOT XOR Two 2-input,4-bit multiplexers 74X157 can be connected to implement a_______________multiploexer 4 input,8 bit 4 input,16 bit 2 input,8 bit 2 input,4 bit The output of an AND gate is one when_______________ all of the inputs are one any of the input is one any of the inpput is zero all the inputs are zero The diagram given below represents_______________ demorgins law associative law product of sum form sum of product form The 4 bit 2's complpement representation of "-7" is _______________ 111 1111 1001 110 The values that exceed the specified range can not be correctly and are considered as_______________ overflow carry parity sign value The unsigned binary representation can only represent positive binary numbers TRUE FALSE Which of the number is not a representative of hexadecimal system 1234 ABCD 1001 DEFH The extended ASCII code is a_______________code 2 bit 7 bit 8 bit 16 bit The output of the expression F=A+B+C will be logic_______________when A=0,B =1,C=1 the symbol'+' here represents OR gate undefined one zero 10(binary) TRUE FALSE The 3-variable Karnaugh has_______________cells for min or max terms 4 8 12 16 The binary value of 1010 is converted to the product term TRUE FALSE A logic circuit with an output consists of_______________ two AND gates,two OR gates,two inverter three AND gates,two OR gates,one inverter two AND gates,one OR gates,two inverters two AND gates,one OR gate The main use of the multipplexer is to select data from multiple sources anad to route it to a single destination select data from single source and to route it to the multiple destinations select data from single source and to route to single destination select data from multiple sources and to route to multiple destinations comparator multiplexer demultiplexer parity generator Using multiplexer as parallel to serial converter requires_______________connected to the multiplexer A parallel to sserial converter circuit A counter circuit A BCD to decimal decoder A 2 to 8 bit decoder A demultiplexer is not available commercially TRUE FALSE The ABEL symbol for "XOR" operation is$
#
!
&
Sequential circuits have storage elements
TRUE
FALSE
A latch has _______________ stable states
one
two
three
four
An S-R latch can be implemented by using_______________gates
AND,OR
NAND,NOR
NAND,XOR
NOT,XOR
In the binary number"10011" the weight of the most significant digit is_______________
24
23
20
21
Which oned is true
power consumption of TTL is higher than of CMOS
power consumption of CMOS is higher than of TTL
both TTL and CMOS have same power consumption
power consumption of both CMOS and TTL depends no.of gates in the circuit
(A+B)(A+ +C)( +C) is an example of _______________
product of sum form
sum of product form
demorgins law
associative law
Circuits have a bubble at their outputs are considered to have an active low output
TRUE
FALSE
The quad multiplexer has _______________ outputs
4
8
12
16
All the ABEL equations must end with_______________
"."
"$" ";" "endl" The OLMC of the GAL16V8 is _______________to the OLMC of the GAL22V10 similar difference similar with some enhancements depends on the type of PALs input size The ABEL symbol for "OR" operation is ! & #$
The GAI22V10 has_______________inputs
22
10
44
20
When the control line in tri-state buffer is high the buffer operates like a _______________gate
AND
OR
NOT
XOR
NOR gate is formed by connecting_______________
OR gate and then NOT gate
NOT gate and then OR gate
AND gate and then OR gate
OR gate and then AND gate
The AND Gate performs  alogical_______________function
addition
subtraction
multiplication
division
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